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Schrunner Stefan, Jenul Anna, Scheider Michael, Zernig Anja, Kaestner Andre, Kern Roman

A Health Factor for Process Patterns - Enhancing Semiconductor Manufacturing by Pattern Recognition in Analog Wafermaps

2019 IEEE International Conference on Systems, Man and Cybernetics (SMC), Bari, Italy, 2019

Electrical measurement data at the end of semi- conductor frontend production, so-called wafer test data, pro- vide deep insight into the preceding manufacturing process. Patterns in these datasets, such as spatial regularities on the wafer, frequently indicate that deviations occurred during production, potentially leading to failures in the produced devices. As such patterns of interest differ w.r.t. their shapes and equally important their intensities, pattern recognition is challenging, but crucial as a prerequisite for production environments in Industry 4.0. In this work, we propose an indicator for the presence and development of process patterns, a so-called ”Health Factor for Process Patterns”, embedded in a framework of statistical decision theory. We provide adequate machine learning components, focusing on the recognition and assessment of known patterns in analog wafer test data. Finally, we conduct experiments using simulated as well as real-world datasets to demonstrate that our method yields competitive results and can be extended to a decision support system for industrial usage.

Santos Tiago, Schrunner Stefan, Geiger Bernhard, Pfeiler Olivia, Zernig Anja, Kaestner Andre, Kern Roman

Feature Extraction From Analog Wafermaps: A Comparison of Classical Image Processing and a Deep Generative Model

IEEE Transactions on Semiconductor Manufacturing, IEEE, 2019

Semiconductor manufacturing is a highly innovative branch of industry, where a high degree of automation has already been achieved. For example, devices tested to be outside of their specifications in electrical wafer test are automatically scrapped. In this paper, we go one step further and analyze test data of devices still within the limits of the specification, by exploiting the information contained in the analog wafermaps. To that end, we propose two feature extraction approaches with the aim to detect patterns in the wafer test dataset. Such patterns might indicate the onset of critical deviations in the production process. The studied approaches are: 1) classical image processing and restoration techniques in combination with sophisticated feature engineering and 2) a data-driven deep generative model. The two approaches are evaluated on both a synthetic and a real-world dataset. The synthetic dataset has been modeled based on real-world patterns and characteristics. We found both approaches to provide similar overall evaluation metrics. Our in-depth analysis helps to choose one approach over the other depending on data availability as a major aspect, as well as on available computing power and required interpretability of the results

Schrunner Stefan, Bluder Olivia, Zernig Anja, Kaestner Andre, Kern Roman

A Comparison of Supervised Approaches for Process Pattern Recognition in Analog Semiconductor Wafer Test Data

2018 17th IEEE International Conference on Machine Learning and Applications (ICMLA), 2018

The semiconductor industry is currently leveragingto exploit machine learning techniques to improve and automate the manufacturing process. An essential step is the wafer test, where each single device is measured electrically, resulting in an image of the wafer. Our work is based on the hypothesis that deviations of production processes can be detected via spatial patterns on these wafermaps. Supervised learning methods are one possibility to recognize such patterns in an automated way - however, the training sample size is very low. In our work, we present and compare several methods for multiclass classification, which can deal with this limitation: multiclass decision trees, as well as decomposition methods like round robin and error- correcting output coding (ECOC). As elementary classifiers, we compare binary decision trees and logistic regression using an elastic net regularization. The evaluation shows that the decomposition methods outperform the multiclass decision tree regarding both, accuracy and practical demands.

Schrunner Stefan, Bluder Olivia, Zernig Anja, Kaestner Andre, Kern Roman

Markov Random Fields for Pattern Extraction in Analog Wafer Test Data

International Conference on Image Processing Theory, Tools and Applications (IPTA 2017), IEEE, Montreal, Canada, 2017

In semiconductor industry it is of paramount im- portance to check whether a manufactured device fulfills all quality specifications and is therefore suitable for being sold to the customer. The occurrence of specific spatial patterns within the so-called wafer test data, i.e. analog electric measurements, might point out on production issues. However the shape of these critical patterns is unknown. In this paper different kinds of process patterns are extracted from wafer test data by an image processing approach using Markov Random Field models for image restoration. The goal is to develop an automated procedure to identify visible patterns in wafer test data to improve pattern matching. This step is a necessary precondition for a subsequent root-cause analysis of these patterns. The developed pattern ex- traction algorithm yields a more accurate discrimination between distinct patterns, resulting in an improved pattern comparison than in the original dataset. In a next step pattern classification will be applied to improve the production process control.
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